APB Slave

Features

• APB Salve
• Configurable and customizable
• Synthesized on ASIC 40nm TSMC and Xilinx FPGA
• Compatible with AMBA standard

Functional Description

APB :

The Advanced Peripheral Bus (APB) is used for connecting low bandwidth peripherals.

It is a simple non-pipelined protocol that can be used to communicate (read or write) from a bridge/master to a number of slaves through the shared bus.

The reads and writes share the same set of signals and no burst data transfers are supported.

The latest spec is available on ARM website and is a relatively easy protocol to learn.

Applications

• APB Master
• AXI Bus
• SOC Designs

IP Deliverables

• Synthesizable Verilog
• System model (Matlab)
• Verilog test bench
• Comprehensive documentation

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