NavIC LDPC Decoder

Benefits

● Low area design.
● Low-power and low-complexity design.
● Irregular parity check matrix.
● Iterative decoding.
● Min-sum algorithm.
● Soft decision decoding.

Key Features
● Throughput matching the required specifications.
● Bit-Error-Rate (BER) and Block-Error-Rate (BLER)
performance meet the required specifications.

Deliverables
● Synthesizable Verilog
● System Model (Matlab)
● Verilog Test Benches
● Documentation

Features
● Compliant with ‘ISRO-NAVIC-ICD-SPS-L1-1.0’ standard [1].
● Supports the deinterleaver and LDPC decoder for subframes 2 and 3.

Applications
● Satellite Navigation.
● Global Positioning Service receiver